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SP690A/692A/802L/ 802M/805L/805M
Low Power Microprocessor Supervisory with Battery Switch-Over
s Precision Voltage Monitor: SP690A/SP802L/SP805L at 4.65V SP692A/SP802M/SP805M at 4.40V s Reset Time Delay - 200ms s Watchdog Timer - 1.6 sec timeout s Minimum component count s 60A Maximum Operating Supply Current s 0.6A Maximum Battery Backup Current s 0.1A Maximum Battery Standby Current s Power Switching 250mA Output in VCC Mode (0.6) 25mA Output in Battery Mode (5) s Voltage Monitor for Power Fail or Low Battery Warning s Available in 8 pin SO and DIP packages s RESET asserted down to VCC = 1V s Pin Compatible Upgrades to MAX690A/692A/802L/802M/805L DESCRIPTION The SP690A/692A/802L/802M/805L/805M are a family of microprocessor (P) supervisory circuits that integrate a myriad of components involved in discrete solutions to monitor powersupply and battery-control functions in P and digital systems. The series will significantly improve system reliability and operational efficiency when compared to discrete solutions. The features of the SP690A/692A/802L/802M/805L/805M include a watchdog timer, a P reset and backup-battery switchover, and power-failure warning, a complete P monitoring and watchdog solution. The series is ideal for applications in automotive systems, computers, controllers, and intelligent instruments. All designs where it is critical to monitor the power supply to the P and it's related digital components will find the series to be an ideal solution.
PART NUMBER SP690A SP692A SP802L SP802M SP805L SP805M
SP690A/692ADS/08
RESET Threshold 4.65 V 4.40 V 4.65 V 4.40 V 4.65 V 4.40 V
RESET Accuracy 125mV 125mV 75mV 75mV 125mV 125mV
RESET Active LOW LOW LOW LOW HIGH HIGH
PFI Accuracy 4% 4% 2% 2% 4% 4%
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
(c) Copyright 2000 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device. VCC........................................................-0.3V to 6.0V VBATT.....................................................-0.3V to 6.0V All Other Inputs (NOTE 1)..................-0.3V to (VCC to 0.3V) Input Current: VCC.........................................................250mA VBATT........................................................50mA GND........................................................20mA Output Current: VOUT.....Short-Circuit Protected for up to 10sec All Other Inputs.................................20mA Rate of Rise, VCC,VBATT..................100V/s Continuous Power Dissipation.......500mW Storage Temperature.......-65C to +160C Lead Temperature(soldering,10sec).................+300C ESD Rating.............................................................4KV
SPECIFICATIONS
Vcc=4.75v to 5.50V for SP690A/SP802L/SP805L, VCC=4.50V to 5.50V for SP692A/SP802M/SP805M, VBATT=2.80V, TA=TMIN to TMAX, typical specified at 25OC, unless otherwise noted.
PARAMETERS Operating Voltage Range,
MIN. 0
TYP.
MAX. 5.5
UNITS Volts
CONDITIONS
VCC or VBATT, Note 2
Supply Current, ISUPPLY, ISUPPLY in Battery Backup Mode, VCC = 0V, VBATT = 2.8V VBATT Standby Current, NOTE 3 VOUT Output VOUT in Battery-Backup Mode VCC < VBATT - 0.2V Battery Switch Threshold, VCC to VBATT Battery Switchover Hysteresis Reset Threshold 4.50 4.25 4.55 4.30 -0.1 VCC - 0.1 VBATT -0.15 VCC - 0.03 VCC - 0.15 VBATT - 0.04 VBATT - 0.20 20 -20 40 4.65 4.40 4.75 4.50 4.70 4.45 35 0.001 60 0.6 0.02 A A A Volts VCC > VBATT + 0.2V IOUT = 50mA IOUT = 250mA IOUT = 5mA IOUT = 25mA Power-up Power-down Peak to Peak SP690A, SP802L, SP805L SP692A, SP802M, SP805M SP802L, TA = +25 C, VCC falling SP802M, TA = +25 C, VCC falling excluding IOUT
Volts
mV mV
Volts
SP690A/692ADS/08
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
(c) Copyright 2000 Sipex Corporation
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SPECIFICATIONS (continued)
Vcc=4.75v to 5.50V for SP690A/SP802L/SP805L, VCC=4.50V to 5.50V for SP692A/SP802M/SP805M, VBATT=2.80V, TA=TMIN to TMAX, typical specified at 25OC, unless otherwise noted.
PARAMETERS Reset Threshold Hysteresis Reset Pulse Width, tRS RESET Output Voltage, NOTE 5
MIN.
TYP. 40
MAX.
UNITS mV
CONDITIONS Peak to Peak
140 VCC - 1.5
200
280
ms ISOURCE = 800A
0.1 0.004
0.4 0.3
Volts
ISINK = 3.2mA ISINK = 50A, VCC = 1.0 ISOURCE = 4A, VCC = 1.0V,
RESET Output Voltage, NOTE 6
0.8 VCC - 1.5 0.1 0.4 2.25 sec ns 0.8 3.5 50 -50 1.250 1.250 0.01 150 Volts A Volts
ISOURCE = 800A ISINK = 3.2mA
Watchdog Timeout, tWD WDI Pulse Width, tWP WDI Input Threshold, VCC = 5V, NOTE 4 WDI Input Current
1.00 50
1.60
VIL = 0.4V, VIH = (0.8)(VCC) Logic low Logic high WDI =VCC WDI = 0V SP690A/692A, SP805L/M SP802L/M
-150 PFI Input Threshold 1.200 1.225 -25 VCC - 1.5
1.300 1.275 25
Volts nA Volts
PFI Input Current PFO Output Voltage
0.1
0.4
ISOURCE = 800A ISINK = 3.2mA
NOTE 1: The input voltage limits on PFI (pin 4) and WDI (pin 6) may be exceeded if the current into these pins is limited to less than 10 mA. NOTE 2: Either VCC or VBATT can go to 0V if the other is greater than 2.0V. NOTE 3: "-" equals the battery-charging current, "+" equals the battery-discharging current. NOTE 4: WDI is guaranteed to be in an intermediate, non-logic level state if WDI is floating and VCC is in the operating voltage range. WDI is internally biased to 35% of VCC with an input impedance of 50K. NOTE 5: SP690A, SP692A, SP802L, and SP802M only. NOTE 6: SP805L and SP805M only.
SP690A/692ADS/08
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
(c) Copyright 2000 Sipex Corporation
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VBATT
BATTERY-SWITCHOVER CIRCUITRY
VOUT
VOUT VCC GND PFI
1 2 3 4
8 7 6 5
VBATT RESET (RESET)* WDI PFO *( ) SP805 only
3.5V WDI WATCHDOG TIMER 1.25V VCC RESET GENERATOR RESET (RESET)*
Figure 10. Pinout
PIN ASSIGNMENTS Pin 1 --VOUT -- Output Supply Voltage. VOUT connects to VCC when VCC is greater than VBATT and VCC is above the reset threshold. When VCC falls below VBATT and VCC is below the reset threshold, VOUT connects to VBATT. Connect a 0.1F capacitor from VOUT to GND. Pin 2 -- VCC -- +5V Supply Input Pin3 -- GND -- Ground reference for all signals Pin 4 -- PFI -- Power-Fail Input. This is the noninverting input to the power-fail comparator. When PFI is less than 1.25V, PFO goes low. Connect PFI to GND or VOUT when not used. Pin 5 -- PFO -- Power-Fail Output. Pin 6 -- WDI -- Watchdog Input. WDI is a three level input. If WDI remains high or low for 1.6sec, the internal watchdog timer triggers a reset. If WDI is left floating or connected to a high-impedance tri-state buffer, the watchdog feature is disabled. The internal watchdog timer clears whenever reset is asserted. Pin 7 for SP690A/692A/802 only -- RESET (Active Low)- Reset Output. RESET Output goes low whenever VCC falls below the reset threshold or whenever WDI remains high or low longer than 1.6 seconds. RESET remains low for 200ms after VCC crosses the reset threshold voltage on power-up or after being triggered by WDI.
SP690A/692ADS/08 SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over (c) Copyright 2000 Sipex Corporation
0.8V PFI PFO 1.25V
*( ) SP805 only
Figure 11. Internal Block Diagram
Pin 7 for SP805 only -- RESET (Active High)- Reset Output is the inverse of RESET; when RESET is asserted, the RESET output voltage = V CC or V BATT , whichever is higher. Pin 8 -- VBATT -- Backup-Battery Input. When VCC falls below the reset threshold, VBATT will be switched to VOUT if VBATT is 20mV greater than VCC. When VCC rises 20mV above V BATT , V OUT will be reconnected to V CC . The 40mV hysteresis prevents repeated switching if VCC falls slowly.
4
TYPICAL CHARACTERISTICS (25oC, unless otherwise noted)
VCC Supply Current vs. Temperature (Normal Mode)
51 47 43 39 35 31 27 23 19 -60 -30
Battery Supply Current vs. Temperature (Backup Mode)
2.9
PFI Threshold vs. Temperature
1.256
VBATT Current (A)
VCC Current (A)
2.4 1.9 1.4 0.9 0.4
PFI Threshold (V)
VCC=5V VBATT=2.8V
VCC=0V VBATT=2.8V
1.254 1.252 1.250 1.248 1.246 -60 -30 0
VCC=5V VBATT=0 NO LOAD ON PFO
0
30
60
90
120 150
-0.1 -60 -40 -20 0 20 40 60 80 100 120 140
30
60
90
120 150
Temperature Deg. C
Temperature Deg. C
Temperature Deg. C
VBATT to VOUT ON Resistance vs. Temperature
15 0.9
VCC to VOUT On Resistance vs. Temperature
Resistance (ohms)
0.8 0.7 0.6 0.5 0.4 0.3
Reset Threshold vs. Temperature
4.70 4.69 4.68 4.67 4.66 4.65 4.64 4.63 4.62 4.61 4.60 -60
Resistance (ohms)
10
VBATT=2.8V
5
VBATT=4.5V
0 -60
-30
0
30
60
90
120
150
-60
-30
0
30
60
90
120 150
Reset Threshold (V)
VCC=0V
VBATT=2V
VCC=5V VBATT=0V
SP690A
VBATT=0V Power Down
-30
0
30
60
90
120 150
Temperature Deg. C
Temperature Deg. C
Temperature Deg. C
Reset Output Resistance vs. Temperature
600
Reset Delay vs. Temperature
212
Reset Delay (mS)
Resistance (ohms)
210 208 206 204 202 200 -60
VBATT Current(A) Log Scale
VCC=5V,VBATT=2.8V 500 Soucing Current
400 300 200 100 0 -60
VCC=0V to 5V Step, VBATT=2.8V
Battery Current vs. VCC Voltage
IE+2 IE+1 IE+0 IE-1 IE-2 IE-3 IE-4 IE-5 IE-6 IE-7 IE-8 .0000
VBATT=2.8V
VCC=0V,VBATT=2.8V Sink Current
-30 0 30 60 90 120 150
-30
0
30
60
90
120 150
Temperature Deg. C
Temperature Deg. C
VCC (0.5V/div)
5.000
SP690A/692ADS/08
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
(c) Copyright 2000 Sipex Corporation
5
1000
1000
VCC=4.5V VBATT=0V Slope=0.6 Voltage Drop(mV)
100
VBATT=4.5V VCC=0V Slope=5 Voltage Drop(mV)
100
10
10
1 1 10 100 1000
1
1
10
100
IOUT (mA)
IOUT (mA)
Figure 1. VCC to VOUT Vs. Output Current
Figure 2. VBATT to VOUT Vs. Output Current
VCC
VCC 2V div 0V RESET VBATT = 0V TA = 25oC
VBATT = 0V TA = +25 C VCC
2K RESET RESET 330pF
0V
GND
1sec/div
Figure 3A. SP690A RESET Output Voltage vs. Supply Voltage
Figure 3B. Circuit for the SP690A/802L RESET Output Voltage vs. Supply Voltage
VCC
VCC 2V div 0V 5V
VCC
RESET
RESET 0V
VBATT GND
1sec/div
330pF
10K
Figure 4A. SP805L RESET Output Voltage vs. Supply Voltage
Figure 4B. Circuit for the SP805 RESET Output Voltage vs. Supply Voltage
SP690A/692ADS/08
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
(c) Copyright 2000 Sipex Corporation
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VCC
+5V VCC
TA = +25 C VCC
+4V
+5V
RESET
10K RESET
0V
30pF
2s/div
GND
Figure 5B. Circuit for the SP690A/802L RESET Response Time
Figure 5A. SP690A RESET Response Time
VCC
+5V VCC +4V
VCC
+4V
RESET
RESET VBATT GND 330pF 10K
0V
2s/div
Figure 6A. SP805L RESET Response Time
Figure 6B. Circuit for the SP805 RESET Response Time
VCC = 5V VBATT = 0V +1.3V PFI +1.2V
+5V VCC = +5V TA = +25 C 1K PFI PFO 30pF
5V
PFO
0V
+1.25V
500ns/div
Figure 7A. Power-Fail Comparator Response Time (FALL)
Figure 7B. Circuit for the Power-Fail Comparator Response Time (FALL)
(c) Copyright 2000 Sipex Corporation
SP690A/692ADS/08
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
7
+1.3V
PFI
VCC = 5V VBATT = 0V
+5V VCC = +5V TA = +25 C PFI PFO 30pF 1K
+1.2V
3V
PFO 0V
+1.25V
2s/div
Figure 8A. Power-Fail Comparator Response Time (RISE)
Figure 8B. Circuit for the Power-Fail Comparator Response Time (RISE)
+5V
VCC
0V +5V
RESET* RESET**
tRS 0V +5V 3.0V 0V
+5V
VOUT
0V +5V 0V
3.0V
PFO
VBATT = PFI = 3.0V
*SP690A/692A/802L/802M **SP805L/805M
Figure 9. Timing Diagram
SP690A/692ADS/08
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
(c) Copyright 2000 Sipex Corporation
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FEATURES The SP690A/692A/802L/802M/805L/805M provide four key functions: 1. A battery backup switching for CMOS RAM, CMOS microprocessors, or other logic. 2. A reset output during power-up, power-down and brownout conditions. 3. A reset pulse if the optional watchdog timer has not been toggled within a specified time. 4. A 1.25V threshold detector for power-fail warning, low battery detection, or to monitor a power supply other than +5V. The parts differ in their reset-voltage threshold levels and reset outputs. The SP690A/802L/ 805L generate a reset when the supply voltage drops below 4.65V. The SP692A/802M/805M generate a reset below 4.40V. The SP690A/692A/802L/802M/805L/805M are ideally suited for applications in automotive systems, intelligent instruments, and batterypowered computers and controllers. All designs into an environment where it is critical to monitor the power supply to the P and it's related digital components will find the SSP690A/692A/802L/802M/805L/805M ideal.
THEORY OF OPERATION The SP690A/692A/802L/802M/805L/805M microprocessor (P) supervisory circuits monitor the power supplied to digital circuits such as microprocessors, microcontrollers, or memory. The series is an ideal solution for portable, battery-powered equipment that requires power supply monitoring. Implementing this series will reduce the number of components and overall complexity. The watchdog functions of this product family will continuously oversee the operational status of a system. The operational features and benefits of the SP690A/692A/802L/802M/805L/805M are described in more detail below. Reset Output The microprocessor's (P's) reset input starts the P in a known state. When the P is in an unknown state, it should be held in reset. The SP690A/SP692A/SP802 assert reset during power-up and prevent code execution errors during power-down or brownout conditions. On power-up, once VCC reaches 1V, RESET is guaranteed to be a logic low. As VCC rises, RESET remains low. When VCC exceeds the reset threshold, RESET will remain low for 200ms, Figure 9. If a brownout condition occurs and VCC dips below the reset threshold, RESET is triggered. Each time RESET is triggered, it stays low for the reset pulse width interval. If a brownout condition interrupts a previously initiated reset pulse, the reset pulse continues for another 200ms. On power-down, once VCC goes below the threshold, RESET is guaranteed to be logic low until VCC drops below 1V. RESET is also triggered by a watchdog timeout. If WDI remains either high or low for a period that exceeds the watchdog timeout period (1.6 sec), RESET pulses low for 200mS. As long as RESET is asserted, the watchdog timer remains clear. When RESET comes high, the watchdog resumes timing and must be serviced within 1.6sec. If WDI is tied high or low, a RESET pulse is triggered every 1.8sec (tWD plus tRS).
Regulated +5V Unregulated DC VCC P RESET NMI I/O LINE GND
BUS
VCC
0.1F RESET PFO WDI VOUT
R1 PFI R2 VBATT
GND 3.6V Lithium Battery
CMOS RAM GND
VCC
Figure 12. Typical Operating Circuit
SP690A/692ADS/08
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
(c) Copyright 2000 Sipex Corporation
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The SP805L/M active-high RESET output is the inverse of the SP690A/SP692A/SP802 RESET output, and is valid with VCC down to 1V. Some P's, such as Intel's 80C51, require an active-high reset pulse. Watchdog Input The watchdog circuit monitors the P's activity. If the P does not toggle the watchdog input (WDI) within 1.6sec, a reset pulse is triggered. The internal 1.6sec timer is cleared by either a reset pulse or by floating the WDI input. As long as RESET is asserted or the WDI input is floating, the timer remains cleared and does not count. As soon as RESET is released and WDI is driven high or low, the timer starts counting. It can detect pulses as short as 50ns.
Power-Fail Comparator The Power-Fail Comparator can be used as an under-voltage detector to signal the failing of a power supply (it is completely separate from the rest of the circuitry and does not need to be dedicated to this function). The PFI input is compared to an internal 1.25V reference. If PFI is less than 1.25V, PFO goes low. The external voltage divider drives PFI to sense the unregulated DC input to the +5V regulator. The voltage-divider ratio can be chosen such that the voltage at PFI falls below 1.25V just before the +5V regulator drops out. PFO then triggers an interrupt which signals the P to prepare for power-down. When VBATT connects to VOUT, the power-fail comparator is turned off and PFO is forced low to conserve backup-battery power. Backup-Battery Switchover
VBATT
VCC
SW1
D1
D2
SW2
VOUT
D3
GND
CONDITION VCC > Reset Threshold VCC < Reset Threshold and VCC > VBATT VCC < Reset Threshold and VCC < VBATT SW1 Open Open Closed SW2 Closed Closed Open
In the event of a brownout or power failure, it may be necessary to preserve the contents of RAM. With a backup battery installed at VBATT, the RAM is assured to have power if VCC fails. As long as VCC exceeds the reset threshold, VOUT connects to VCC through a 0.6 PMOS power switch. Once VCC falls below the reset threshold, VCC or VBATT, whichever is higher, switches to VOUT. VBATT connects to VOUT through a 5 switch only when VCC is below the reset threshold and VBATT is greater than VCC. When VCC exceeds the reset threshold, it is connected to VOUT, regardless of the voltage applied to VBATT Figure 13. During this time, the diode (D1) between VBATT and VOUT will conduct current from VBATT to VOUT if VBATT is more than .6V above VOUT. When VBATT connects to VOUT, backup mode is activated and the internal circuitry will be powered from the battery Figure 14. When VCC is just below VBATT, in the backup mode the current drawn from VBATT will be typically 30A. When VCC drops to more than 1V below VBATT, the internal switchover comparator shuts off and the supply current falls to less than 0.6A.
Reset Threshold = 4.65V in SP690A/802L/805L Reset Threshold = 4.40V in SP692A/802M/805M Figure 13. BACKUP-BATTERY Switchover Block Diagram
SP690A/692ADS/08
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
(c) Copyright 2000 Sipex Corporation
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SIGNAL V CC VOUT
STATUS Disconnected from VOUT Connected to VBATT through an internal 8 PMOS switch Connected to VOUT. Current
VBATT 0.1F
+5V VCC VOUT CONNECT TO STATIC RAM CONNECT TO P
VBATT
drawn from the battery is less than 0.6A, as long as VCC < VBATT - 1V. Power-fail comparator is disabled. Logic low Logic low Logic high (SP805 only) Watchdog timer is disabled
RESET (RESET)* GND
*( ) SP805L only
PFI PFO RESET RESET WDI
Figure 16. Backup Power Source Using High Capacity Capacitor with SP690A/802L/805L and a +5V 5% Supply
Figure 14. Input and Output Status in Battery-Backup Mode. To enter the Battery-Backup mode, VCC must be less than the Reset threshold and less than VBATT.
If VCC is above the reset threshold and VBATT is 0.5V above VCC, current flows to VOUT and VCC from VBATT until the voltage at VBATT is less than 0.5V above VCC. Leakage current through the capacitor charging diode and the SP690A/SP802L/SP805L internal power diode eventually discharges the capacitor to VCC. Also, if VCC and VBATT start from 0.5V above the reset threshold and power is lost at VCC, the capacitor on VBATT discharges through VCC until VBATT reaches the reset threshold; the SP690A/SP802L/SP805L then switches to battery-backup mode.
Using a High Capacity Capacitor as a Backup Power Source VBATT has the same operating voltage range as VCC, and the battery-switchover threshold voltages are typically +20mV centered at VBATT, allowing use of a capacitor and a simple charging circuit as a backup source (see Figure 16).
PART NUMBER SP690A SP802L SP805L SP692A SP802M SP805M
MAXIMUM BACKUP-BATTERY VOLTAGE [V] 4.80
0.1F 100K VBATT
+5V VCC VOUT CONNECT TO STATIC RAM CONNECT TO P
RESET (RESET)* GND
4.55
*( ) SP805M only
Figure 15. Allowable BACKUP-BATTERY Voltages
Figure 17. Backup Power Source Using High Capacity Capacitor with SP692A/802M/805M and a +5V 10% Supply
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SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
(c) Copyright 2000 Sipex Corporation
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+5V VIN VCC PFI R3 PFO *optional GND VTRIP = connect to P 1.25 R2 R1 + R2 *C1 R2 R1
Operation Without a Backup Power Source If a backup power source is not used, ground VBATT and connect VOUT to VCC. Since there is no need to switch over to any backup power source, VOUT does not need to be switched. A direct connection to VCC eliminates any voltage drops across the switch which may push VOUT below VCC. Replacing the Backup Battery The backup battery can be removed while VCC remains valid, without danger of triggering RESET/RESET. As long as VCC stays above the reset threshold, battery-backup mode cannot be entered. Adding Hysteresis to the Power-Fail Comparator Hysteresis adds a noise margin to the power-fail comparator and prevents repeated triggering of PFO when VIN is close to its trip point. Figure 18 shows how to add hysteresis to the power-fail comparator. Select the ratio of R1 and R2 such that PFI sees 1.25V when VIN falls to its trip point (VTRIP). R3 adds the hysteresis. It will typically be an order of magnitude greater (about 10 times) than R1 or R2. The current through R1 and R2 should be at least 1A to ensure that the 25nA (max) PFI input current does not shift the trip point. R3 should be larger than 10K so it does not load down the PFO pin. Capacitor C1 adds additional noise rejection. Monitoring a Negative Voltage The power-fail comparator can be used to monitor a negative supply rail using the circuit of Figure 19. When the negative rail is valid, PFO is low. When the negative supply voltage drops, PFO goes high. This circuit's accuracy is affected by the PFI threshold tolerance, the VCC voltage, and the resistors, R1 and R2.
1.25 R2
=
VL - 1.25 + 5.0 - 1.25 R3 R1 1.25 R2 || R3 R1 + R2 || R3
VH =
PFO
+5V 0V 0V
VL VTRIP VH
VIN
Figure 18. Adding Hysteresis to the POWER-FAIL Comparator
Allowable Backup Power-Source Batteries Lithium batteries work very well as backup batteries due to very low self-discharge rate and high energy density. Single lithium batteries with open-circuit voltages of 3.0V to 3.6V are ideal. Any battery with an open-circuit voltage less than the minimum reset threshold plus 0.3V can be connected directly to the VBATT input of this series with no additional circuitry; see FIGURE 12. However, batteries with opencircuit voltages that are greater than this value cannot be used for backup, as current is sourced into VOUT through the diode (D1 in Figure 13) when VCC is close to the reset threshold.
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SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
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+5V VCC PFI R2 PFO VGND 5.0 - 1.25 = 1.25 - VTRIP R2 R1 PFO +5V 0V 0V *VTRIP R1
Buffered RESET connects to System Components
+5V VCC
+5V VCC P RESET 4.7K RESET
GND
GND
Figure 20. Interfacing to Microprocessors with Bidirectional RESET I/O
V-
*VTRIP is a negative voltage
Figure 19. Monitoring a Negative Voltage
Interfacing to Microprocessors with Bidirectional Reset Pins Microprocessors with bidirectional reset pins, such as the Motorola 68HC11 series, can contend with this series' RESET output. If, for example, the RESET output is driven high and the P wants to pull it low, indeterminate logic levels may result. To correct this, connect a 4.7K resistor between the RESET output and the P reset I/O, as in Figure 20. Buffer the RESET output to other system components.
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SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
(c) Copyright 2000 Sipex Corporation
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PACKAGE: PLASTIC DUAL-IN-LINE (NARROW)
E1 E
D1 = 0.005" min. (0.127 min.) D
A1 = 0.015" min. (0.381min.) A = 0.210" max. (5.334 max). A2 C O eA = 0.300 BSC (7.620 BSC) L
e = 0.100 BSC (2.540 BSC)
B1 B
ALTERNATE END PINS (BOTH ENDS)
DIMENSIONS (Inches) Minimum/Maximum (mm) A2 B B1 C D E E1 L O
8-PIN 0.115/0.195 (2.921/4.953) 0.014/0.022 (0.356/0.559) 0.045/0.070 (1.143/1.778) 0.008/0.014 (0.203/0.356)
14-PIN 0.115/0.195 (2.921/4.953) 0.014/0.022 (0.356/0.559) 0.045/0.070 (1.143/1.778) 0.008/0.014 (0.203/0.356)
16-PIN 0.115/0.195 (2.921/4.953) 0.014/0.022 (0.356/0.559) 0.045/0.070 (1.143/1.778) 0.008/0.014 (0.203/0.356)
18-PIN 0.115/0.195 (2.921/4.953) 0.014/0.022 (0.356/0.559) 0.045/0.070 (1.143/1.778) 0.008/0.014 (0.203/0.356)
20-PIN 0.115/0.195 (2.921/4.953) 0.014/0.022 (0.356/0.559) 0.045/0.070 (1.143/1.778) 0.008/0.014 (0.203/0.356)
22-PIN 0.115/0.195 (2.921/4.953) 0.014/0.022 (0.356/0.559) 0.045/0.070 (1.143/1.778) 0.008/0.014 (0.203/0.356)
0.355/0.400 0.735/0.775 0.780/0.800 0.880/0.920 0.980/1.060 1.145/1.155 (9.017/10.160) (18.669/19.685) (19.812/20.320) (22.352/23.368) (24.892/26.924) (29.083/29.337) 0.300/0.325 (7.620/8.255) 0.240/0.280 (6.096/7.112) 0.115/0.150 (2.921/3.810) 0/ 15 (0/15) 0.300/0.325 (7.620/8.255) 0.240/0.280 (6.096/7.112) 0.115/0.150 (2.921/3.810) 0/ 15 (0/15) 0.300/0.325 (7.620/8.255) 0.240/0.280 (6.096/7.112) 0.115/0.150 (2.921/3.810) 0/ 15 (0/15) 0.300/0.325 (7.620/8.255) 0.240/0.280 (6.096/7.112) 0.115/0.150 (2.921/3.810) 0/ 15 (0/15) 0.300/0.325 (7.620/8.255) 0.240/0.280 (6.096/7.112) 0.115/0.150 (2.921/3.810) 0/ 15 (0/15) 0.300/0.325 (7.620/8.255) 0.240/0.280 (6.096/7.112) 0.115/0.150 (2.921/3.810) 0/ 15 (0/15)
SP690A/692ADS/08
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
(c) Copyright 2000 Sipex Corporation
14
PACKAGE: PLASTIC SMALL OUTLINE (SOIC) (NARROW)
E
H
h x 45 D A O e B A1 L
DIMENSIONS (Inches) Minimum/Maximum (mm) A A1 B D E e H h L O
8-PIN 0.053/0.069 (1.346/1.748) 0.004/0.010 (0.102/0.249 0.014/0.019 (0.35/0.49) 0.189/0.197 (4.80/5.00) 0.150/0.157 (3.802/3.988) 0.050 BSC (1.270 BSC) 0.228/0.244 (5.801/6.198) 0.010/0.020 (0.254/0.498) 0.016/0.050 (0.406/1.270) 0/8 (0/8)
14-PIN 0.053/0.069 (1.346/1.748) 0.004/0.010 (0.102/0.249) 0.013/0.020 (0.330/0.508)
16-PIN 0.053/0.069 (1.346/1.748) 0.004/0.010 (0.102/0.249) 0.013/0.020 (0.330/0.508)
0.337/0.344 0.386/0.394 (8.552/8.748) (9.802/10.000) 0.150/0.157 (3.802/3.988) 0.050 BSC (1.270 BSC) 0.228/0.244 (5.801/6.198) 0.010/0.020 (0.254/0.498) 0.016/0.050 (0.406/1.270) 0/8 (0/8) 0.150/0.157 (3.802/3.988) 0.050 BSC (1.270 BSC) 0.228/0.244 (5.801/6.198) 0.010/0.020 (0.254/0.498) 0.016/0.050 (0.406/1.270) 0/8 (0/8)
SP690A/692ADS/08
SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over
(c) Copyright 2000 Sipex Corporation
15
ORDERING INFORMATION
Model Temperature Range Package Types SP690ACN..........................................................0C to +70C....................................................8-Pin NSOIC SP690ACP........................................................0C to +70C.........................................................8-Pin PDIP SP690AEN......................................................-40C to +85C.....................................................8-Pin NSOIC SP690AEP.......................................................-40C to +85C.......................................................8-Pin PDIP SP692ACN........................................................0C to +70C......................................................8-Pin NSOIC SP692ACP........................................................0C to +70C.........................................................8-Pin PDIP SP692AEN......................................................-40C to +85C.....................................................8-Pin NSOIC SP692AEP.......................................................-40C to +85C.......................................................8-Pin PDIP SP802LCN........................................................0C to +70C......................................................8-Pin NSOIC SP802LCP........................................................0C to +70C.........................................................8-Pin PDIP SP802LEN.......................................................-40C to +85C....................................................8-Pin NSOIC SP802LEP.......................................................-40C to +85C.......................................................8-Pin PDIP SP802MCN.......................................................0C to +70C......................................................8-Pin NSOIC SP802MCP.......................................................0C to +70C.........................................................8-Pin PDIP SP802MEN......................................................-40C to +85C....................................................8-Pin NSOIC SP802MEP......................................................-40C to +85C.......................................................8-Pin PDIP SP805LCN........................................................0C to +70C......................................................8-Pin NSOIC SP805LCP........................................................0C to +70C.........................................................8-Pin PDIP SP805LEN.......................................................-40C to +85C....................................................8-Pin NSOIC SP805LEP.......................................................-40C to +85C.......................................................8-Pin PDIP SP805MCN.......................................................0C to +70C......................................................8-Pin NSOIC SP805MCP.......................................................0C to +70C.........................................................8-Pin PDIP SP805MEN......................................................-40C to +85C....................................................8-Pin NSOIC SP805MEP......................................................-40C to +85C.......................................................8-Pin PDIP
Please consult the factory for pricing and availability on a Tape-On-Reel option.
Corporation
SIGNAL PROCESSING EXCELLENCE
Sipex Corporation Headquarters and Sales Office 22 Linnell Circle Billerica, MA 01821 TEL: (978) 667-8700 FAX: (978) 670-9001 e-mail: sales@sipex.com Sales Office 233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others. SP690A/692ADS/08 SP690A/692A Low Power Microprocessor Supervisory with Battery Switch-Over (c) Copyright 2000 Sipex Corporation
16


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